25 |
25 |
26 #ifndef __NK_X86_H__ |
26 #ifndef __NK_X86_H__ |
27 #define __NK_X86_H__ |
27 #define __NK_X86_H__ |
28 #include <nk_cpu.h> |
28 #include <nk_cpu.h> |
29 |
29 |
30 class TSubScheduler; |
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31 class TScheduler; |
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32 struct TX86Tss; |
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33 |
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34 // TSubScheduler member data |
30 // TSubScheduler member data |
35 struct TSubSchedulerX |
31 #define i_IrqCount iExtras[9] // count of interrupts handled |
36 { |
32 #define i_ExcInfo iExtras[10] // pointer to exception info for crash debugger |
37 TUint32 iSSXP[9]; |
33 #define i_CrashState iExtras[11] // 0=normal, 1=this CPU faulted, 2=this CPU has received an NMI and halted |
38 volatile TUint32 iIrqCount; // count of interrupts handled |
34 #define i_APICID iExtras[12] // Local APIC ID for this CPU (starts at -1) |
39 TAny* iExcInfo; // pointer to exception info for crash debugger |
35 #define i_IrqNestCount iExtras[13] // IRQ nest count for this CPU (starts at -1) |
40 volatile TInt iCrashState; // 0=normal, 1=this CPU faulted, 2=this CPU has received an NMI and halted |
36 #define i_IrqStackTop iExtras[14] // Top of IRQ stack for this CPU |
41 TUint32 iAPICID; // Local APIC ID for this CPU (starts at -1) |
37 #define i_Tss iExtras[15] // Address of TSS for this CPU |
42 volatile TInt iIrqNestCount; // IRQ nest count for this CPU (starts at -1) |
38 #define i_TimerMultF iExtras[16] // Timer frequency / Max Timer frequency * 2^32 |
43 TLinAddr iIrqStackTop; // Top of IRQ stack for this CPU |
39 #define i_TimerMultI iExtras[17] // Max Timer frequency / Timer frequency * 2^24 |
44 TX86Tss* iTss; // Address of TSS for this CPU |
40 #define i_CpuMult iExtras[18] // CPU frequency / Max CPU frequency * 2^32 |
45 SRatioInv iCpuFreqRI; // Ratio of CPU frequency to maximum possible CPU frequency |
41 #define i_TimestampOffset iExtras[20] // 64 bit value to add to CPU TSC to give NKern::Timestamp() |
46 SRatioInv iTimerFreqRI; // Ratio of CPU local timer frequency to maximum possible |
42 #define i_TimestampOffsetL iExtras[20] // |
47 |
43 #define i_TimestampOffsetH iExtras[21] // |
48 volatile TUint64HL iTimestampOffset; // 64 bit value to add to CPU TSC to give NKern::Timestamp() |
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49 |
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50 TUint32 iSSXP2[36]; |
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51 TUint64 iSSXP3; // one 64 bit value to guarantee alignment |
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52 }; |
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53 |
44 |
54 // TScheduler member data |
45 // TScheduler member data |
55 struct TSchedulerX |
46 #define i_TimerMax iExtras[16] // Maximum per-CPU timer frequency (after prescaling) |
56 { |
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57 TUint64 iTimerMax; // Maximum per-CPU timer frequency (after prescaling) |
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58 TUint32 iSXP[30]; |
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59 }; |
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60 |
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61 |
47 |
62 #define CRASH_IPI_VECTOR 0x27 |
48 #define CRASH_IPI_VECTOR 0x27 |
63 #define RESCHED_IPI_VECTOR 0x28 |
49 #define RESCHED_IPI_VECTOR 0x28 |
64 #define TIMESLICE_VECTOR 0x29 |
50 #define TIMESLICE_VECTOR 0x29 |
65 #define GENERIC_IPI_VECTOR 0x2A |
51 #define GENERIC_IPI_VECTOR 0x2A |
80 class TX86RegSet; |
66 class TX86RegSet; |
81 class NThread : public NThreadBase |
67 class NThread : public NThreadBase |
82 { |
68 { |
83 public: |
69 public: |
84 TInt Create(SNThreadCreateInfo& anInfo, TBool aInitial); |
70 TInt Create(SNThreadCreateInfo& anInfo, TBool aInitial); |
85 void Stillborn(); |
71 inline void Stillborn() |
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72 {} |
86 void GetUserContext(TX86RegSet& aContext, TUint32& aAvailRegMask); |
73 void GetUserContext(TX86RegSet& aContext, TUint32& aAvailRegMask); |
87 void SetUserContext(const TX86RegSet& aContext, TUint32& aRegMask); |
74 void SetUserContext(const TX86RegSet& aContext, TUint32& aRegMask); |
88 void GetSystemContext(TX86RegSet& aContext, TUint32& aAvailRegMask); |
75 void GetSystemContext(TX86RegSet& aContext, TUint32& aAvailRegMask); |
89 void CompleteContextSave(); |
76 void CompleteContextSave(); |
90 public: |
77 public: |