kerneltest/e32test/dma/dmasim.cpp
branchRCL_3
changeset 256 c1f20ce4abcf
parent 87 2f92ad2dc5db
child 257 3e88ff8f41d5
equal deleted inserted replaced
249:a179b74831c9 256:c1f20ce4abcf
     1 // Copyright (c) 2002-2010 Nokia Corporation and/or its subsidiary(-ies).
     1 // Copyright (c) 2002-2009 Nokia Corporation and/or its subsidiary(-ies).
     2 // All rights reserved.
     2 // All rights reserved.
     3 // This component and the accompanying materials are made available
     3 // This component and the accompanying materials are made available
     4 // under the terms of the License "Eclipse Public License v1.0"
     4 // under the terms of the License "Eclipse Public License v1.0"
     5 // which accompanies this distribution, and is available
     5 // which accompanies this distribution, and is available
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
   353  */
   353  */
   354 	{
   354 	{
   355 public:
   355 public:
   356 	static void StartEmulation();
   356 	static void StartEmulation();
   357 	static void StopEmulation();
   357 	static void StopEmulation();
       
   358 	static TBool InISR();
       
   359 	static void Synchronize();
   358 private:
   360 private:
   359 	enum { KPeriod = 1 }; // in ms
   361 	enum { KPeriod = 1 }; // in ms
       
   362 	enum { EDmaSimIdle=0u, EDmaSimStarted=1u, EDmaSimInISR=2u, EDmaSimStopping=0x80000000u };
   360 	static void TickCB(TAny* aThis);
   363 	static void TickCB(TAny* aThis);
   361 	static NTimer Timer;
   364 	static NTimer Timer;
       
   365 	static volatile TInt StartStop;
   362 	};
   366 	};
   363 
   367 
   364 NTimer DmacSim::Timer;
   368 NTimer DmacSim::Timer;
       
   369 volatile TInt DmacSim::StartStop;
   365 
   370 
   366 void DmacSim::StartEmulation()
   371 void DmacSim::StartEmulation()
   367 	{
   372 	{
       
   373 	__DMA_ASSERTA(StartStop==EDmaSimIdle);
   368 	new (&Timer) NTimer(&TickCB, 0);
   374 	new (&Timer) NTimer(&TickCB, 0);
       
   375 	__e32_atomic_store_ord32(&StartStop, EDmaSimStarted);
   369 	__DMA_ASSERTA(Timer.OneShot(KPeriod, EFalse) == KErrNone);
   376 	__DMA_ASSERTA(Timer.OneShot(KPeriod, EFalse) == KErrNone);
   370 	}
   377 	}
   371 
   378 
   372 void DmacSim::StopEmulation()
   379 void DmacSim::StopEmulation()
   373 	{
   380 	{
   374 	// Ensure that timer really is cancelled.
   381 	TInt orig = __e32_atomic_tas_ord32(&StartStop, (TInt)EDmaSimStarted, (TInt)EDmaSimStopping, 0);
   375 	TBool cancelled = EFalse;
   382 	if (orig == EDmaSimIdle)
   376 	do
   383 		return;		// wasn't running
   377 		{
   384 	// loop until we succeed in cancelling the timer or the timer callback
   378 		cancelled = Timer.Cancel();
   385 	// notices that we are shutting down
   379 		}
   386 	while (!Timer.Cancel() && __e32_atomic_load_acq32(&StartStop)!=EDmaSimIdle)
   380 	while(!cancelled);
   387 		{}
       
   388 	__e32_atomic_store_ord32(&StartStop, EDmaSimIdle);
   381 	}
   389 	}
   382 
   390 
   383 void DmacSim::TickCB(TAny*)
   391 void DmacSim::TickCB(TAny*)
   384 	{
   392 	{
   385 	DmacSb::DoTransfer();
   393 	TInt orig = (TInt)__e32_atomic_ior_acq32(&StartStop, EDmaSimInISR);
   386 	DmacDb::DoTransfer();
   394 	if (orig >= 0)
   387 	DmacSg::DoTransfer();
   395 		{
   388 	__DMA_ASSERTA(Timer.Again(KPeriod) == KErrNone);
   396 		DmacSb::DoTransfer();
       
   397 		DmacDb::DoTransfer();
       
   398 		DmacSg::DoTransfer();
       
   399 		}
       
   400 	orig = (TInt)__e32_atomic_and_rel32(&StartStop, (TUint32)~EDmaSimInISR);
       
   401 	if (orig < 0)
       
   402 		{
       
   403 		__e32_atomic_store_rel32(&StartStop, EDmaSimIdle);
       
   404 		return;
       
   405 		}
       
   406 	TInt r = Timer.Again(KPeriod);
       
   407 	if (r == KErrArgument)
       
   408 		r = Timer.OneShot(KPeriod);
       
   409 	__DMA_ASSERTA(r == KErrNone);
       
   410 	}
       
   411 
       
   412 TBool DmacSim::InISR()
       
   413 	{
       
   414 	return __e32_atomic_load_acq32(&StartStop) & EDmaSimInISR;
       
   415 	}
       
   416 
       
   417 void DmacSim::Synchronize()
       
   418 	{
       
   419 	while (InISR())
       
   420 		{}
   389 	}
   421 	}
   390 
   422 
   391 //////////////////////////////////////////////////////////////////////////////
   423 //////////////////////////////////////////////////////////////////////////////
   392 // PSL FOR DMA SIMULATION
   424 // PSL FOR DMA SIMULATION
   393 //////////////////////////////////////////////////////////////////////////////
   425 //////////////////////////////////////////////////////////////////////////////
   440 
   472 
   441 
   473 
   442 void DSimSbController::StopTransfer(const TDmaChannel& aChannel)
   474 void DSimSbController::StopTransfer(const TDmaChannel& aChannel)
   443 	{
   475 	{
   444 	__e32_atomic_and_ord32(&DmacSb::ControlStatus[aChannel.PslId()], (TUint32)~DmacSb::ECsRun);
   476 	__e32_atomic_and_ord32(&DmacSb::ControlStatus[aChannel.PslId()], (TUint32)~DmacSb::ECsRun);
       
   477 	DmacSim::Synchronize();
   445 	}
   478 	}
   446 
   479 
   447 
   480 
   448 TInt DSimSbController::FailNext(const TDmaChannel& aChannel)
   481 TInt DSimSbController::FailNext(const TDmaChannel& aChannel)
   449 	{
   482 	{
   540 
   573 
   541 
   574 
   542 void DSimDbController::StopTransfer(const TDmaChannel& aChannel)
   575 void DSimDbController::StopTransfer(const TDmaChannel& aChannel)
   543 	{
   576 	{
   544 	__e32_atomic_and_ord32(&DmacDb::ControlStatus[aChannel.PslId()], (TUint32)~(DmacDb::ECsRun|DmacDb::ECsPrg));
   577 	__e32_atomic_and_ord32(&DmacDb::ControlStatus[aChannel.PslId()], (TUint32)~(DmacDb::ECsRun|DmacDb::ECsPrg));
       
   578 	DmacSim::Synchronize();
   545 	}
   579 	}
   546 
   580 
   547 
   581 
   548 TInt DSimDbController::FailNext(const TDmaChannel& aChannel)
   582 TInt DSimDbController::FailNext(const TDmaChannel& aChannel)
   549 	{
   583 	{
   670 
   704 
   671 
   705 
   672 void DSimSgController::StopTransfer(const TDmaChannel& aChannel)
   706 void DSimSgController::StopTransfer(const TDmaChannel& aChannel)
   673 	{
   707 	{
   674 	__e32_atomic_and_ord32(&DmacSg::ChannelControl[aChannel.PslId()], (TUint32)~DmacSg::EChannelBitRun);
   708 	__e32_atomic_and_ord32(&DmacSg::ChannelControl[aChannel.PslId()], (TUint32)~DmacSg::EChannelBitRun);
       
   709 	DmacSim::Synchronize();
   675 	}
   710 	}
   676 
   711 
   677 
   712 
   678 void DSimSgController::InitHwDes(const SDmaDesHdr& aHdr, TUint32 aSrc, TUint32 aDest, TInt aCount,
   713 void DSimSgController::InitHwDes(const SDmaDesHdr& aHdr, TUint32 aSrc, TUint32 aDest, TInt aCount,
   679 								 TUint /*aFlags*/, TUint32 /*aPslInfo*/, TUint32 /*aCookie*/)
   714 								 TUint /*aFlags*/, TUint32 /*aPslInfo*/, TUint32 /*aCookie*/)