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1 // Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\common\arm\atomic_ops.h |
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15 // |
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16 // |
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17 |
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18 #ifdef __OPERATION__ |
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19 |
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20 #undef __OPERATION__ |
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21 #undef __OP_RMW1__ |
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22 #undef __OP_RMW2__ |
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23 #undef __OP_RMW3__ |
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24 #undef __OP_SIGNED__ |
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25 #undef __TYPE__ |
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26 #undef __SIZE_CODE__ |
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27 #undef __LDR_INST__ |
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28 #undef __LDRS_INST__ |
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29 #undef __STR_INST__ |
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30 #undef __LDREX_INST__ |
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31 #undef __STREX_INST__ |
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32 #undef __SIGN_EXTEND__ |
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33 #undef __LOG2_DATA_SIZE__ |
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34 |
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35 #undef __OP_LOAD__ |
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36 #undef __OP_STORE__ |
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37 #undef __OP_SWP__ |
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38 #undef __OP_CAS__ |
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39 #undef __OP_ADD__ |
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40 #undef __OP_AND__ |
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41 #undef __OP_IOR__ |
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42 #undef __OP_XOR__ |
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43 #undef __OP_AXO__ |
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44 #undef __OP_TAU__ |
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45 #undef __OP_TAS__ |
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46 |
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47 #undef ENSURE_8BYTE_ALIGNMENT |
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48 |
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49 #else // __OPERATION__ |
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50 |
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51 #if defined(__OP_LOAD__) |
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52 #define __OPERATION__ load |
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53 #elif defined(__OP_STORE__) |
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54 #define __OPERATION__ store |
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55 #elif defined(__OP_SWP__) |
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56 #define __OPERATION__ swp |
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57 #define __OP_RMW1__ |
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58 #elif defined(__OP_CAS__) |
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59 #define __OPERATION__ cas |
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60 #elif defined(__OP_ADD__) |
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61 #define __OPERATION__ add |
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62 #define __OP_RMW1__ |
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63 #elif defined(__OP_AND__) |
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64 #define __OPERATION__ and |
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65 #define __OP_RMW1__ |
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66 #elif defined(__OP_IOR__) |
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67 #define __OPERATION__ ior |
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68 #define __OP_RMW1__ |
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69 #elif defined(__OP_XOR__) |
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70 #define __OPERATION__ xor |
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71 #define __OP_RMW1__ |
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72 #elif defined(__OP_AXO__) |
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73 #define __OPERATION__ axo |
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74 #define __OP_RMW2__ |
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75 #elif defined(__OP_TAU__) |
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76 #define __OPERATION__ tau |
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77 #define __OP_RMW3__ |
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78 #elif defined(__OP_TAS__) |
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79 #define __OPERATION__ tas |
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80 #define __OP_RMW3__ |
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81 #define __OP_SIGNED__ |
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82 #else |
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83 #error Unknown atomic operation |
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84 #endif |
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85 |
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86 #if __DATA_SIZE__==8 |
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87 #define __LOG2_DATA_SIZE__ 3 |
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88 #define __SIZE_CODE__ "b" |
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89 #ifdef __CPU_ARM_HAS_LDREX_STREX_V6K |
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90 #define __LDREX_INST__(Rd,Rn) LDREXB(Rd,Rn) |
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91 #define __STREX_INST__(Rd,Rm,Rn) STREXB(Rd,Rm,Rn) |
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92 #endif |
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93 #define __SIGN_EXTEND__(reg) asm("mov "#reg ", "#reg ", lsl #24 "); asm("mov "#reg ", "#reg ", asr #24 "); |
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94 #define __LDR_INST__(cc,args) asm("ldr"#cc "b " args) |
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95 #define __LDRS_INST__(cc,args) asm("ldr"#cc "sb " args) |
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96 #define __STR_INST__(cc,args) asm("str"#cc "b " args) |
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97 #ifdef __OP_SIGNED__ |
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98 #define __TYPE__ TInt8 |
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99 #else |
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100 #define __TYPE__ TUint8 |
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101 #endif |
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102 #elif __DATA_SIZE__==16 |
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103 #define __LOG2_DATA_SIZE__ 4 |
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104 #define __SIZE_CODE__ "h" |
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105 #ifdef __CPU_ARM_HAS_LDREX_STREX_V6K |
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106 #define __LDREX_INST__(Rd,Rn) LDREXH(Rd,Rn) |
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107 #define __STREX_INST__(Rd,Rm,Rn) STREXH(Rd,Rm,Rn) |
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108 #endif |
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109 #define __SIGN_EXTEND__(reg) asm("mov "#reg ", "#reg ", lsl #16 "); asm("mov "#reg ", "#reg ", asr #16 "); |
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110 #define __LDR_INST__(cc,args) asm("ldr"#cc "h " args) |
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111 #define __LDRS_INST__(cc,args) asm("ldr"#cc "sh " args) |
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112 #define __STR_INST__(cc,args) asm("str"#cc "h " args) |
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113 #ifdef __OP_SIGNED__ |
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114 #define __TYPE__ TInt16 |
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115 #else |
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116 #define __TYPE__ TUint16 |
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117 #endif |
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118 #elif __DATA_SIZE__==32 |
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119 #define __LOG2_DATA_SIZE__ 5 |
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120 #define __SIZE_CODE__ "" |
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121 #ifdef __CPU_ARM_HAS_LDREX_STREX |
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122 #define __LDREX_INST__(Rd,Rn) LDREX(Rd,Rn) |
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123 #define __STREX_INST__(Rd,Rm,Rn) STREX(Rd,Rm,Rn) |
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124 #endif |
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125 #define __SIGN_EXTEND__(reg) |
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126 #define __LDR_INST__(cc,args) asm("ldr"#cc " " args) |
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127 #define __LDRS_INST__(cc,args) asm("ldr"#cc " " args) |
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128 #define __STR_INST__(cc,args) asm("str"#cc " " args) |
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129 #ifdef __OP_SIGNED__ |
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130 #define __TYPE__ TInt32 |
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131 #else |
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132 #define __TYPE__ TUint32 |
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133 #endif |
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134 #elif __DATA_SIZE__==64 |
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135 #define __LOG2_DATA_SIZE__ 6 |
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136 #define __SIZE_CODE__ "d" |
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137 #ifdef __CPU_ARM_HAS_LDREX_STREX_V6K |
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138 #define __LDREX_INST__(Rd,Rn) LDREXD(Rd,Rn) |
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139 #define __STREX_INST__(Rd,Rm,Rn) STREXD(Rd,Rm,Rn) |
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140 #endif |
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141 #ifdef __OP_SIGNED__ |
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142 #define __TYPE__ TInt64 |
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143 #else |
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144 #define __TYPE__ TUint64 |
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145 #endif |
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146 #else |
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147 #error Invalid data size |
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148 #endif |
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149 |
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150 #if (defined(__GNUC__) && (__GNUC__ >= 3)) || defined(__EABI__) |
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151 // Check 8 byte aligned and cause alignment fault if not. |
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152 // Doesn't work if alignment checking is disabled but gives consistent behaviour |
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153 // between processors with ldrexd etc and these hand coded versions. |
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154 #define ENSURE_8BYTE_ALIGNMENT(rAddr) \ |
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155 asm("tst r"#rAddr", #0x7 "); \ |
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156 asm("orrne r"#rAddr", r"#rAddr", #1 "); \ |
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157 asm("ldmne r"#rAddr", {r"#rAddr"} ") |
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158 #else |
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159 // Don't assert on old gcc (arm4) as it is not eabi compliant and this stops |
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160 // kernel booting. |
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161 #define ENSURE_8BYTE_ALIGNMENT(rAddr) |
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162 #endif |
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163 #endif // __OPERATION__ |