135 asm("add r0, r0, #1 "); |
135 asm("add r0, r0, #1 "); |
136 asm("add r7, r7, #1 "); |
136 asm("add r7, r7, #1 "); |
137 __DATA_MEMORY_BARRIER_Z__(r2); // ensure memory accesses in interrupted code are observed before |
137 __DATA_MEMORY_BARRIER_Z__(r2); // ensure memory accesses in interrupted code are observed before |
138 // the writes to i_IrqCount, i_IrqNestCount |
138 // the writes to i_IrqCount, i_IrqNestCount |
139 asm("str r0, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_IrqCount)); // increment i_IrqCount |
139 asm("str r0, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_IrqCount)); // increment i_IrqCount |
140 asm("ldr r11, [r12,#%a0]" : : "i" _FOFF(SArmInterruptInfo,iIrqHandler)); // address if IRQ handler |
140 asm("ldr r11, [r12,#%a0]" : : "i" _FOFF(SArmInterruptInfo,iIrqHandler)); // address of IRQ handler |
141 asm("ldr r6, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_GicCpuIfcAddr)); |
141 asm("ldr r6, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_GicCpuIfcAddr)); |
142 asm("str r7, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_IrqNestCount)); // increment i_IrqNestCount |
142 asm("str r7, [r4, #%a0]" : : "i" _FOFF(TSubScheduler, i_IrqNestCount)); // increment i_IrqNestCount |
143 |
143 |
144 asm("1: "); |
144 asm("1: "); |
145 #ifdef BTRACE_CPU_USAGE |
145 #ifdef BTRACE_CPU_USAGE |