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1 /* |
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2 * Copyright (C) 2010 Apple Inc. All rights reserved. |
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3 * |
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4 * Redistribution and use in source and binary forms, with or without |
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5 * modification, are permitted provided that the following conditions |
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6 * are met: |
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7 * 1. Redistributions of source code must retain the above copyright |
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8 * notice, this list of conditions and the following disclaimer. |
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9 * 2. Redistributions in binary form must reproduce the above copyright |
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10 * notice, this list of conditions and the following disclaimer in the |
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11 * documentation and/or other materials provided with the distribution. |
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12 * |
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13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS'' |
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14 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
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15 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS |
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17 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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18 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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19 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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20 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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21 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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23 * THE POSSIBILITY OF SUCH DAMAGE. |
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24 */ |
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25 |
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26 #ifndef JSInterfaceJIT_h |
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27 #define JSInterfaceJIT_h |
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28 |
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29 #include "JITCode.h" |
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30 #include "JITStubs.h" |
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31 #include "JSImmediate.h" |
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32 #include "MacroAssembler.h" |
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33 #include "RegisterFile.h" |
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34 #include <wtf/AlwaysInline.h> |
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35 #include <wtf/Vector.h> |
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36 |
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37 namespace JSC { |
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38 class JSInterfaceJIT : public MacroAssembler { |
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39 public: |
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40 // NOTES: |
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41 // |
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42 // regT0 has two special meanings. The return value from a stub |
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43 // call will always be in regT0, and by default (unless |
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44 // a register is specified) emitPutVirtualRegister() will store |
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45 // the value from regT0. |
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46 // |
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47 // regT3 is required to be callee-preserved. |
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48 // |
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49 // tempRegister2 is has no such dependencies. It is important that |
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50 // on x86/x86-64 it is ecx for performance reasons, since the |
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51 // MacroAssembler will need to plant register swaps if it is not - |
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52 // however the code will still function correctly. |
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53 #if CPU(X86_64) |
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54 static const RegisterID returnValueRegister = X86Registers::eax; |
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55 static const RegisterID cachedResultRegister = X86Registers::eax; |
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56 static const RegisterID firstArgumentRegister = X86Registers::edi; |
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57 |
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58 static const RegisterID timeoutCheckRegister = X86Registers::r12; |
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59 static const RegisterID callFrameRegister = X86Registers::r13; |
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60 static const RegisterID tagTypeNumberRegister = X86Registers::r14; |
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61 static const RegisterID tagMaskRegister = X86Registers::r15; |
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62 |
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63 static const RegisterID regT0 = X86Registers::eax; |
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64 static const RegisterID regT1 = X86Registers::edx; |
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65 static const RegisterID regT2 = X86Registers::ecx; |
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66 static const RegisterID regT3 = X86Registers::ebx; |
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67 |
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68 static const FPRegisterID fpRegT0 = X86Registers::xmm0; |
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69 static const FPRegisterID fpRegT1 = X86Registers::xmm1; |
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70 static const FPRegisterID fpRegT2 = X86Registers::xmm2; |
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71 static const FPRegisterID fpRegT3 = X86Registers::xmm3; |
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72 #elif CPU(X86) |
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73 static const RegisterID returnValueRegister = X86Registers::eax; |
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74 static const RegisterID cachedResultRegister = X86Registers::eax; |
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75 // On x86 we always use fastcall conventions = but on |
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76 // OS X if might make more sense to just use regparm. |
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77 static const RegisterID firstArgumentRegister = X86Registers::ecx; |
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78 |
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79 static const RegisterID timeoutCheckRegister = X86Registers::esi; |
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80 static const RegisterID callFrameRegister = X86Registers::edi; |
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81 |
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82 static const RegisterID regT0 = X86Registers::eax; |
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83 static const RegisterID regT1 = X86Registers::edx; |
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84 static const RegisterID regT2 = X86Registers::ecx; |
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85 static const RegisterID regT3 = X86Registers::ebx; |
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86 |
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87 static const FPRegisterID fpRegT0 = X86Registers::xmm0; |
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88 static const FPRegisterID fpRegT1 = X86Registers::xmm1; |
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89 static const FPRegisterID fpRegT2 = X86Registers::xmm2; |
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90 static const FPRegisterID fpRegT3 = X86Registers::xmm3; |
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91 #elif CPU(ARM_THUMB2) |
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92 static const RegisterID returnValueRegister = ARMRegisters::r0; |
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93 static const RegisterID cachedResultRegister = ARMRegisters::r0; |
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94 static const RegisterID firstArgumentRegister = ARMRegisters::r0; |
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95 |
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96 static const RegisterID regT0 = ARMRegisters::r0; |
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97 static const RegisterID regT1 = ARMRegisters::r1; |
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98 static const RegisterID regT2 = ARMRegisters::r2; |
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99 static const RegisterID regT3 = ARMRegisters::r4; |
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100 |
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101 static const RegisterID callFrameRegister = ARMRegisters::r5; |
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102 static const RegisterID timeoutCheckRegister = ARMRegisters::r6; |
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103 |
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104 static const FPRegisterID fpRegT0 = ARMRegisters::d0; |
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105 static const FPRegisterID fpRegT1 = ARMRegisters::d1; |
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106 static const FPRegisterID fpRegT2 = ARMRegisters::d2; |
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107 static const FPRegisterID fpRegT3 = ARMRegisters::d3; |
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108 #elif CPU(ARM_TRADITIONAL) |
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109 static const RegisterID returnValueRegister = ARMRegisters::r0; |
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110 static const RegisterID cachedResultRegister = ARMRegisters::r0; |
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111 static const RegisterID firstArgumentRegister = ARMRegisters::r0; |
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112 |
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113 static const RegisterID timeoutCheckRegister = ARMRegisters::r5; |
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114 static const RegisterID callFrameRegister = ARMRegisters::r4; |
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115 |
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116 static const RegisterID regT0 = ARMRegisters::r0; |
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117 static const RegisterID regT1 = ARMRegisters::r1; |
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118 static const RegisterID regT2 = ARMRegisters::r2; |
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119 // Callee preserved |
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120 static const RegisterID regT3 = ARMRegisters::r7; |
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121 |
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122 static const RegisterID regS0 = ARMRegisters::S0; |
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123 // Callee preserved |
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124 static const RegisterID regS1 = ARMRegisters::S1; |
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125 |
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126 static const RegisterID regStackPtr = ARMRegisters::sp; |
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127 static const RegisterID regLink = ARMRegisters::lr; |
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128 |
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129 static const FPRegisterID fpRegT0 = ARMRegisters::d0; |
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130 static const FPRegisterID fpRegT1 = ARMRegisters::d1; |
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131 static const FPRegisterID fpRegT2 = ARMRegisters::d2; |
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132 static const FPRegisterID fpRegT3 = ARMRegisters::d3; |
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133 #elif CPU(MIPS) |
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134 static const RegisterID returnValueRegister = MIPSRegisters::v0; |
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135 static const RegisterID cachedResultRegister = MIPSRegisters::v0; |
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136 static const RegisterID firstArgumentRegister = MIPSRegisters::a0; |
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137 |
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138 // regT0 must be v0 for returning a 32-bit value. |
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139 static const RegisterID regT0 = MIPSRegisters::v0; |
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140 |
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141 // regT1 must be v1 for returning a pair of 32-bit value. |
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142 static const RegisterID regT1 = MIPSRegisters::v1; |
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143 |
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144 static const RegisterID regT2 = MIPSRegisters::t4; |
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145 |
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146 // regT3 must be saved in the callee, so use an S register. |
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147 static const RegisterID regT3 = MIPSRegisters::s2; |
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148 |
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149 static const RegisterID callFrameRegister = MIPSRegisters::s0; |
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150 static const RegisterID timeoutCheckRegister = MIPSRegisters::s1; |
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151 |
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152 static const FPRegisterID fpRegT0 = MIPSRegisters::f4; |
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153 static const FPRegisterID fpRegT1 = MIPSRegisters::f6; |
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154 static const FPRegisterID fpRegT2 = MIPSRegisters::f8; |
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155 static const FPRegisterID fpRegT3 = MIPSRegisters::f10; |
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156 #else |
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157 #error "JIT not supported on this platform." |
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158 #endif |
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159 |
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160 inline Jump emitLoadJSCell(unsigned virtualRegisterIndex, RegisterID payload); |
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161 inline Jump emitLoadInt32(unsigned virtualRegisterIndex, RegisterID dst); |
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162 inline Jump emitLoadDouble(unsigned virtualRegisterIndex, FPRegisterID dst, RegisterID scratch); |
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163 |
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164 #if USE(JSVALUE32_64) |
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165 inline Jump emitJumpIfNotJSCell(unsigned virtualRegisterIndex); |
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166 inline Address tagFor(unsigned index, RegisterID base = callFrameRegister); |
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167 #endif |
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168 |
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169 #if USE(JSVALUE32) || USE(JSVALUE64) |
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170 Jump emitJumpIfImmediateNumber(RegisterID reg); |
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171 Jump emitJumpIfNotImmediateNumber(RegisterID reg); |
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172 void emitFastArithImmToInt(RegisterID reg); |
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173 #endif |
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174 |
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175 inline Address payloadFor(unsigned index, RegisterID base = callFrameRegister); |
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176 inline Address addressFor(unsigned index, RegisterID base = callFrameRegister); |
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177 }; |
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178 |
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179 struct ThunkHelpers { |
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180 static unsigned stringImplDataOffset() { return WebCore::StringImpl::dataOffset(); } |
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181 static unsigned jsStringLengthOffset() { return OBJECT_OFFSETOF(JSString, m_length); } |
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182 static unsigned jsStringValueOffset() { return OBJECT_OFFSETOF(JSString, m_value); } |
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183 }; |
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184 |
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185 #if USE(JSVALUE32_64) |
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186 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadJSCell(unsigned virtualRegisterIndex, RegisterID payload) |
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187 { |
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188 loadPtr(payloadFor(virtualRegisterIndex), payload); |
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189 return emitJumpIfNotJSCell(virtualRegisterIndex); |
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190 } |
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191 |
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192 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitJumpIfNotJSCell(unsigned virtualRegisterIndex) |
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193 { |
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194 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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195 return branch32(NotEqual, tagFor(virtualRegisterIndex), Imm32(JSValue::CellTag)); |
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196 } |
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197 |
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198 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadInt32(unsigned virtualRegisterIndex, RegisterID dst) |
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199 { |
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200 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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201 loadPtr(payloadFor(virtualRegisterIndex), dst); |
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202 return branch32(NotEqual, tagFor(virtualRegisterIndex), Imm32(JSValue::Int32Tag)); |
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203 } |
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204 |
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205 inline JSInterfaceJIT::Address JSInterfaceJIT::tagFor(unsigned virtualRegisterIndex, RegisterID base) |
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206 { |
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207 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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208 return Address(base, (virtualRegisterIndex * sizeof(Register)) + OBJECT_OFFSETOF(JSValue, u.asBits.tag)); |
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209 } |
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210 |
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211 inline JSInterfaceJIT::Address JSInterfaceJIT::payloadFor(unsigned virtualRegisterIndex, RegisterID base) |
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212 { |
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213 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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214 return Address(base, (virtualRegisterIndex * sizeof(Register)) + OBJECT_OFFSETOF(JSValue, u.asBits.payload)); |
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215 } |
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216 |
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217 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadDouble(unsigned virtualRegisterIndex, FPRegisterID dst, RegisterID scratch) |
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218 { |
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219 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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220 loadPtr(tagFor(virtualRegisterIndex), scratch); |
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221 Jump isDouble = branch32(Below, scratch, Imm32(JSValue::LowestTag)); |
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222 Jump notInt = branch32(NotEqual, scratch, Imm32(JSValue::Int32Tag)); |
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223 loadPtr(payloadFor(virtualRegisterIndex), scratch); |
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224 convertInt32ToDouble(scratch, dst); |
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225 Jump done = jump(); |
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226 isDouble.link(this); |
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227 loadDouble(addressFor(virtualRegisterIndex), dst); |
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228 done.link(this); |
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229 return notInt; |
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230 } |
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231 #endif |
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232 |
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233 #if USE(JSVALUE64) |
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234 ALWAYS_INLINE JSInterfaceJIT::Jump JSInterfaceJIT::emitJumpIfImmediateNumber(RegisterID reg) |
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235 { |
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236 return branchTestPtr(NonZero, reg, tagTypeNumberRegister); |
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237 } |
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238 ALWAYS_INLINE JSInterfaceJIT::Jump JSInterfaceJIT::emitJumpIfNotImmediateNumber(RegisterID reg) |
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239 { |
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240 return branchTestPtr(Zero, reg, tagTypeNumberRegister); |
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241 } |
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242 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadJSCell(unsigned virtualRegisterIndex, RegisterID dst) |
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243 { |
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244 loadPtr(addressFor(virtualRegisterIndex), dst); |
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245 return branchTestPtr(NonZero, dst, tagMaskRegister); |
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246 } |
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247 |
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248 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadInt32(unsigned virtualRegisterIndex, RegisterID dst) |
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249 { |
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250 loadPtr(addressFor(virtualRegisterIndex), dst); |
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251 Jump result = branchPtr(Below, dst, tagTypeNumberRegister); |
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252 zeroExtend32ToPtr(dst, dst); |
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253 return result; |
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254 } |
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255 |
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256 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadDouble(unsigned virtualRegisterIndex, FPRegisterID dst, RegisterID scratch) |
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257 { |
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258 loadPtr(addressFor(virtualRegisterIndex), scratch); |
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259 Jump notNumber = emitJumpIfNotImmediateNumber(scratch); |
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260 Jump notInt = branchPtr(Below, scratch, tagTypeNumberRegister); |
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261 convertInt32ToDouble(scratch, dst); |
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262 Jump done = jump(); |
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263 notInt.link(this); |
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264 addPtr(tagTypeNumberRegister, scratch); |
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265 movePtrToDouble(scratch, dst); |
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266 done.link(this); |
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267 return notNumber; |
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268 } |
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269 |
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270 ALWAYS_INLINE void JSInterfaceJIT::emitFastArithImmToInt(RegisterID) |
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271 { |
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272 } |
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273 |
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274 #endif |
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275 |
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276 #if USE(JSVALUE32) |
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277 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadJSCell(unsigned virtualRegisterIndex, RegisterID dst) |
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278 { |
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279 loadPtr(addressFor(virtualRegisterIndex), dst); |
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280 return branchTest32(NonZero, dst, Imm32(JSImmediate::TagMask)); |
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281 } |
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282 |
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283 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadInt32(unsigned virtualRegisterIndex, RegisterID dst) |
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284 { |
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285 loadPtr(addressFor(virtualRegisterIndex), dst); |
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286 Jump result = branchTest32(Zero, dst, Imm32(JSImmediate::TagTypeNumber)); |
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287 rshift32(Imm32(JSImmediate::IntegerPayloadShift), dst); |
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288 return result; |
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289 } |
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290 |
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291 inline JSInterfaceJIT::Jump JSInterfaceJIT::emitLoadDouble(unsigned, FPRegisterID, RegisterID) |
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292 { |
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293 ASSERT_NOT_REACHED(); |
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294 return jump(); |
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295 } |
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296 |
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297 ALWAYS_INLINE void JSInterfaceJIT::emitFastArithImmToInt(RegisterID reg) |
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298 { |
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299 rshift32(Imm32(JSImmediate::IntegerPayloadShift), reg); |
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300 } |
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301 |
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302 #endif |
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303 |
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304 #if !USE(JSVALUE32_64) |
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305 inline JSInterfaceJIT::Address JSInterfaceJIT::payloadFor(unsigned virtualRegisterIndex, RegisterID base) |
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306 { |
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307 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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308 return addressFor(virtualRegisterIndex, base); |
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309 } |
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310 #endif |
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311 |
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312 inline JSInterfaceJIT::Address JSInterfaceJIT::addressFor(unsigned virtualRegisterIndex, RegisterID base) |
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313 { |
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314 ASSERT(static_cast<int>(virtualRegisterIndex) < FirstConstantRegisterIndex); |
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315 return Address(base, (virtualRegisterIndex * sizeof(Register))); |
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316 } |
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317 |
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318 } |
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319 |
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320 #endif // JSInterfaceJIT_h |