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omap3530/omap3530_drivers/spi/omap3530_spi.h
branchBeagle_BSP_dev
changeset 82 65b40f262685
parent 77 e5fd00cbb70a
child 84 09e266454dcf
equal deleted inserted replaced
77:e5fd00cbb70a 82:65b40f262685 
    19 
    19 
    20 #ifndef __OMAP3530_SPI_H__
 
    20 #ifndef __OMAP3530_SPI_H__
 
    21 #define __OMAP3530_SPI_H__
 
    21 #define __OMAP3530_SPI_H__
 
    22 
    22 
    23 #include <assp/omap3530_assp/omap3530_scm.h>
 
    23 #include <assp/omap3530_assp/omap3530_scm.h>
 
       
    24 #include <assp/omap3530_assp/omap3530_gpio.h>
 
    24 
    25 
    25 
    26 
    26 #define BIT_MASK(shift,len)       (((1u << (len)) - 1) << (shift))
 
    27 #define BIT_MASK(shift,len)       (((1u << (len)) - 1) << (shift))
 
    27 #define GET_BITS(w,shift,len)     (((w) >> (shift)) & ((1 << (len)) - 1))
 
    28 #define GET_BITS(w,shift,len)     (((w) >> (shift)) & ((1 << (len)) - 1))
 
    28 #define SET_BITS(w,set,shift,len) ((w) &= ~BIT_MASK(shift, len), (w) |= ((set) << (shift)))
 
    29 #define SET_BITS(w,set,shift,len) ((w) &= ~BIT_MASK(shift, len), (w) |= ((set) << (shift)))
 
   323 
   324 
   324 
   325 
   325 //----------------------------------
 
   326 //----------------------------------
 
   326 // PAD (PIN) configuration for SPI
 
   327 // PAD (PIN) configuration for SPI
 
   327 //----------------------------------
 
   328 //----------------------------------
 
   328 
       
   329 //#define SPI_CHANNEL_3_PIN_OPTION_2 // TODO - move this to mmp file!
 
       
   330 //#define SPI_CHANNEL_3_PIN_OPTION_3
 
       
   331 
       
   332 // flags for CS signal pins - in order to keep them in certain state when SPI is inactive..
 
       
   333 const TUint KCsPinUp = SCM::EPullUdEnable | SCM::EPullTypeSelect; //
 
       
   334 const TUint KCsPinDown = SCM::EPullUdEnable; //
 
       
   335 
       
   336 const TUint KCsPinOffHi =  SCM::EOffOutEnable | SCM::EOffOutValue; //
 
       
   337 const TUint KCsPinOffLow = SCM::EOffOutEnable; //
 
       
   338 
       
   339 const TUint KCsPinModeUp   = /*KCsPinUp   |*//* KCsPinOffHi |*/ SCM::EInputEnable;
 
       
   340 const TUint KCsPinModeDown = KCsPinDown | KCsPinOffLow;
 
       
   341 
       
   342 const TUint KMaxSpiChannelsPerModule = 4; // there are max 4 channels (McSPI 1)
 
   329 const TUint KMaxSpiChannelsPerModule = 4; // there are max 4 channels (McSPI 1)
 
   343 
   330 
   344 struct TPinConfig
 
   331 struct TPinConfig
 
   345 	{
 
   332 	{
 
   346 	TLinAddr              iAddress;
 
   333 	TLinAddr              iAddress;
 
   347 	SCM::TLowerHigherWord iMswLsw;
 
   334 	SCM::TLowerHigherWord iMswLsw;
 
       
   335 	TUint8                iPinNumber;
 
   348 	TUint16               iFlags;
 
   336 	TUint16               iFlags;
 
   349 	};
 
   337 	};
 
   350 
   338 
   351 struct TSpiPinConfig
 
   339 struct TSpiPinConfig
 
   352 	{
 
   340 	{
 
   356 	TPinConfig iCs[KMaxSpiChannelsPerModule];
 
   344 	TPinConfig iCs[KMaxSpiChannelsPerModule];
 
   357 	};
 
   345 	};
 
   358 
   346 
   359 const TSpiPinConfig TSpiPinConfigMcSpi1 =
 
   347 const TSpiPinConfig TSpiPinConfigMcSpi1 =
 
   360 	{
 
   348 	{
 
   361 	{CONTROL_PADCONF_MCSPI1_CLK,  SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi1_clk
 
   349 	{CONTROL_PADCONF_MCSPI1_CLK,  SCM::ELsw, 171, SCM::EMode0 | SCM::EInputEnable}, // mcspi1_clk
 
   362 	{CONTROL_PADCONF_MCSPI1_CLK,  SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi1_simo
 
   350 	{CONTROL_PADCONF_MCSPI1_CLK,  SCM::EMsw, 172, SCM::EMode0 | SCM::EInputEnable}, // mcspi1_simo
 
   363 	{CONTROL_PADCONF_MCSPI1_SOMI, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi1_somi
 
   351 	{CONTROL_PADCONF_MCSPI1_SOMI, SCM::ELsw, 173, SCM::EMode0 | SCM::EInputEnable}, // mcspi1_somi
 
   364 		{
 
   352 		{
 
   365 		{CONTROL_PADCONF_MCSPI1_SOMI, SCM::EMsw, SCM::EMode1}, // mcspi1_cs0
 
   353 		{CONTROL_PADCONF_MCSPI1_SOMI, SCM::EMsw, 174, SCM::EMode0}, // mcspi1_cs0
 
   366 		{CONTROL_PADCONF_MCSPI1_CS1,  SCM::ELsw, SCM::EMode1}, // mcspi1_cs1
 
   354 		{CONTROL_PADCONF_MCSPI1_CS1,  SCM::ELsw, 175, SCM::EMode0}, // mcspi1_cs1
 
   367 		{CONTROL_PADCONF_MCSPI1_CS1,  SCM::EMsw, SCM::EMode1}, // mcspi1_cs2
 
   355 		{CONTROL_PADCONF_MCSPI1_CS1,  SCM::EMsw, 176, SCM::EMode0}, // mcspi1_cs2
 
   368 		{CONTROL_PADCONF_MCSPI1_CS3,  SCM::ELsw, SCM::EMode1}, // mcspi1_cs3
 
   356 		{CONTROL_PADCONF_MCSPI1_CS3,  SCM::ELsw, 177, SCM::EMode0}, // mcspi1_cs3
 
   369 		}
 
   357 		}
 
   370 	};
 
   358 	};
 
   371 
   359 
   372 const TSpiPinConfig TSpiPinConfigMcSpi2 =
 
   360 const TSpiPinConfig TSpiPinConfigMcSpi2 =
 
   373 	{
 
   361 	{
 
   374 	{CONTROL_PADCONF_MCSPI1_CS3,  SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi2_clk
 
   362 	{CONTROL_PADCONF_MCSPI1_CS3,  SCM::EMsw, 178, SCM::EMode0 | SCM::EInputEnable}, // mcspi2_clk
 
   375 	{CONTROL_PADCONF_MCSPI2_SIMO, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi2_simo
 
   363 	{CONTROL_PADCONF_MCSPI2_SIMO, SCM::ELsw, 179, SCM::EMode0 | SCM::EInputEnable}, // mcspi2_simo
 
   376 	{CONTROL_PADCONF_MCSPI2_SIMO, SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi2_somi
 
   364 	{CONTROL_PADCONF_MCSPI2_SIMO, SCM::EMsw, 180, SCM::EMode0 | SCM::EInputEnable}, // mcspi2_somi
 
   377 		{
 
   365 		{
 
   378 		{CONTROL_PADCONF_MCSPI2_CS0,  SCM::ELsw, SCM::EMode1}, // mcspi2_cs0
 
   366 		{CONTROL_PADCONF_MCSPI2_CS0, SCM::ELsw, 181, SCM::EMode0}, // mcspi2_cs0
 
   379 		{CONTROL_PADCONF_MCSPI2_CS0,  SCM::EMsw, SCM::EMode1}, // mcspi2_cs1
 
   367 		{CONTROL_PADCONF_MCSPI2_CS0, SCM::EMsw, 182, SCM::EMode0}, // mcspi2_cs1
 
   380 		{0, SCM::ELsw, 0}, // not supported
 
   368 		{0, SCM::ELsw, 0, 0}, // not supported
 
   381 		{0, SCM::ELsw, 0}, // not supported
 
   369 		{0, SCM::ELsw, 0, 0}, // not supported
 
   382 		}
 
   370 		}
 
   383 	};
 
   371 	};
 
   384 
   372 
   385 
   373 
   386 #if defined(SPI_CHANNEL_3_PIN_OPTION_2)
 
   374 #if defined(SPI_MODULE_3_PIN_OPTION_2)
 
   387 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   375 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   388 	{
 
   376 	{
 
   389 	{CONTROL_PADCONF_DSS_DATA18, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_clk
 
   377 	{CONTROL_PADCONF_DSS_DATA18, SCM::ELsw, 88, SCM::EMode2 | SCM::EInputEnable}, // mcspi3_clk
 
   390 	{CONTROL_PADCONF_DSS_DATA18, SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_simo
 
   378 	{CONTROL_PADCONF_DSS_DATA18, SCM::EMsw, 89, SCM::EMode2 | SCM::EInputEnable}, // mcspi3_simo
 
   391 	{CONTROL_PADCONF_DSS_DATA20, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_somi
 
   379 	{CONTROL_PADCONF_DSS_DATA20, SCM::ELsw, 90, SCM::EMode2 | SCM::EInputEnable}, // mcspi3_somi
 
   392 		{
 
   380 		{
 
   393 		{CONTROL_PADCONF_DSS_DATA20, SCM::EMsw, SCM::EMode1}, // mcspi3_cs0
 
   381 		{CONTROL_PADCONF_DSS_DATA20, SCM::EMsw, 91, SCM::EMode2}, // mcspi3_cs0
 
   394 		{CONTROL_PADCONF_DSS_DATA20, SCM::ELsw, SCM::EMode1}, // mcspi3_cs1
 
   382 		{CONTROL_PADCONF_DSS_DATA22, SCM::ELsw, 92, SCM::EMode2}, // mcspi3_cs1
 
   395 		{0, SCM::ELsw, 0}, // not supported
 
   383 		{0, SCM::ELsw, 0, 0}, // not supported
 
   396 		{0, SCM::ELsw, 0}, // not supported
 
   384 		{0, SCM::ELsw, 0, 0}, // not supported
 
   397 		}
 
   385 		}
 
   398 	};
 
   386 	};
 
   399 #elif defined(SPI_CHANNEL_3_PIN_OPTION_3)
 
   387 #elif defined(SPI_MODULE_3_PIN_OPTION_3)
 
   400 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   388 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   401 	{
 
   389 	{
 
   402 	{CONTROL_PADCONF_ETK_D2, SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_clk
 
   390 	{CONTROL_PADCONF_ETK_D2, SCM::EMsw, 17, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_clk
 
   403 	{CONTROL_PADCONF_ETK_D0, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_simo
 
   391 	{CONTROL_PADCONF_ETK_D0, SCM::ELsw, 14, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_simo
 
   404 	{CONTROL_PADCONF_ETK_D0, SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_somi
 
   392 	{CONTROL_PADCONF_ETK_D0, SCM::EMsw, 15, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_somi
 
   405 		{
 
   393 		{
 
   406 		{CONTROL_PADCONF_ETK_D2, SCM::ELsw, SCM::EMode1}, // mcspi3_cs0
 
   394 		{CONTROL_PADCONF_ETK_D2, SCM::ELsw, 16, SCM::EMode1}, // mcspi3_cs0
 
   407 		{CONTROL_PADCONF_ETK_D6, SCM::EMsw, SCM::EMode1}, // mcspi3_cs1
 
   395 		{CONTROL_PADCONF_ETK_D6, SCM::EMsw, 21, SCM::EMode1}, // mcspi3_cs1
 
   408 		{0, SCM::ELsw, 0}, // not supported
 
   396 		{0, SCM::ELsw, 0, 0}, // not supported
 
   409 		{0, SCM::ELsw, 0}, // not supported
 
   397 		{0, SCM::ELsw, 0, 0}, // not supported
 
   410 		}
 
   398 		}
 
   411 	};
 
   399 	};
 
   412 #else // default option (for beagle- these are pins on the extension header)
 
   400 #else // default option (for beagle- these are pins on the extension header)
 
   413 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   401 const TSpiPinConfig TSpiPinConfigMcSpi3 =
 
   414 	{
 
   402 	{
 
   415 	{CONTROL_PADCONF_MMC2_CLK,  SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_clk
 
   403 	{CONTROL_PADCONF_MMC2_CLK,  SCM::ELsw, 130, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_clk
 
   416 	{CONTROL_PADCONF_MMC2_CLK,  SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_simo
 
   404 	{CONTROL_PADCONF_MMC2_CLK,  SCM::EMsw, 131, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_simo
 
   417 	{CONTROL_PADCONF_MMC2_DAT0, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_somi
 
   405 	{CONTROL_PADCONF_MMC2_DAT0, SCM::ELsw, 132, SCM::EMode1 | SCM::EInputEnable}, // mcspi3_somi
 
   418 		{
 
   406 		{
 
   419 		{CONTROL_PADCONF_MMC2_DAT2, SCM::EMsw, SCM::EMode1}, // mcspi3_cs0
 
   407 		{CONTROL_PADCONF_MMC2_DAT2, SCM::EMsw, 135, SCM::EMode1}, // mcspi3_cs0
 
   420 		{CONTROL_PADCONF_MMC2_DAT2, SCM::ELsw, SCM::EMode1}, // mcspi3_cs1
 
   408 		{CONTROL_PADCONF_MMC2_DAT2, SCM::ELsw, 134, SCM::EMode1}, // mcspi3_cs1
 
   421 		{0, SCM::ELsw, 0}, // not supported
 
   409 		{0, SCM::ELsw, 0, 0}, // not supported
 
   422 		{0, SCM::ELsw, 0}, // not supported
 
   410 		{0, SCM::ELsw, 0, 0}, // not supported
 
   423 		}
 
   411 		}
 
   424 	};
 
   412 	};
 
   425 #endif
 
   413 #endif
 
   426 
   414 
   427 const TSpiPinConfig TSpiPinConfigMcSpi4 =
 
   415 const TSpiPinConfig TSpiPinConfigMcSpi4 =
 
   428 	{
 
   416 	{
 
   429 	{CONTROL_PADCONF_MCBSP1_CLKR, SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_clk
 
   417 	{CONTROL_PADCONF_MCBSP1_CLKR, SCM::ELsw, 156, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_clk
 
   430 	{CONTROL_PADCONF_MCBSP1_DX,   SCM::ELsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_simo
 
   418 	{CONTROL_PADCONF_MCBSP1_DX,   SCM::ELsw, 158, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_simo
 
   431 	{CONTROL_PADCONF_MCBSP1_DX,   SCM::EMsw, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_somi
 
   419 	{CONTROL_PADCONF_MCBSP1_DX,   SCM::EMsw, 159, SCM::EMode1 | SCM::EInputEnable}, // mcspi4_somi
 
   432 		{
 
   420 		{
 
   433 		{CONTROL_PADCONF_MCBSP_CLKS, SCM::EMsw, SCM::EMode1}, // mcspi3_cs0
 
   421 		{CONTROL_PADCONF_MCBSP_CLKS, SCM::EMsw, 161, SCM::EMode1}, // mcspi3_cs0
 
   434 		{0, SCM::ELsw, 0}, // not supported
 
   422 		{0, SCM::ELsw, 0, 0}, // not supported
 
   435 		{0, SCM::ELsw, 0}, // not supported
 
   423 		{0, SCM::ELsw, 0, 0}, // not supported
 
   436 		{0, SCM::ELsw, 0}, // not supported
 
   424 		{0, SCM::ELsw, 0, 0}, // not supported
 
   437 		}
 
   425 		}
 
   438 	};
 
   426 	};
 
   439 
   427 
   440 const TSpiPinConfig ModulePinConfig[] =
 
   428 const TSpiPinConfig ModulePinConfig[] =
 
   441 	{
 
   429 	{
FCL/sf/adapt/beagleboard